Integrated bluetooth and wireless LAN transceivers having merged low noise and power amplifier

ABSTRACT

A group of transistors operate as a combined power amplifier, to amplify signals to be transmitted, and as a low noise amplifier, to amplify signals which are received. In a first mode, the group of transistors is configured to amplify the signals to be transmitted by turning all of the transistors in both a first subset and a second subset on. In a second mode, the group of transistors is configured to amplify the signals which have been received by turning on the first subset of transistors and turning off the second subset of transistors.

RELATED APPLICATION

This application is related to, and claims priority from, U.S.Provisional Patent Application No. 61/370,895, entitled “IntegratedBluetooth and Wireless LAN Transceivers”, filed on Aug. 5, 2010, thedisclosure of which is incorporated here by reference.

TECHNICAL FIELD

The present invention relates generally to communications systems,devices and methods and, in particular, to systems where transmissionsand receptions are combined with a switch to connect to one antenna portor filter.

BACKGROUND

As technology advances, the options for communications have become morevaried. For example, in the last 30 years in the telecommunicationsindustry, personal communications have evolved from a home having asingle rotary dial telephone, to a home having multiple telephone, cableand/or fiber optic lines that accommodate both voice and data.Additionally cellular phones and wireless networking technologies haveadded a mobile element to communications. In terms of wirelessnetworking communications, two of the currently dominant, standardizedapproaches are specified in the Wireless LAN (WLAN, “Wi-Fi”,802.11a/b/g/n) standard and the Bluetooth standard.

WLAN devices are frequently used, for example, to provide wirelessInternet connectivity and operate in two frequency bands, i.e., a lowband disposed in the 2.4 GHz Industrial, Scientific and Medical Band(ISM band) and a high band disposed in the 5 GHz range. Bluetoothdevices also operate in the 2.4 GHz band and are frequently used, forexample, for short range wireless communications, e.g., between a mobilephone and an associated earbud device.

SUMMARY

According to an exemplary embodiment, a combined power amplifier and lownoise amplifier includes a plurality of transistors connected to oneanother and configured to operate in a first mode as a power amplifierfor a signal to be transmitted by said device, and further configured tooperate in a second mode as a low noise amplifier for a signal which hasbeen received by the device, the plurality of transistors including afirst subset of transistors and a second subset of transistors, whereinin the first mode the first subset of transistors and the second subsetof transistors are configured to be turned on to operate together as thepower amplifier, wherein in the second mode the first subset of theplurality of transistors are configured to be turned on to operate asthe low noise amplifier and the second subset of the plurality oftransistors are configured to be turned off.

According to another exemplary embodiment, a method for amplifyingreceived signals and signals to be transmitted in a combined poweramplifier and low noise amplifier device includes the steps of providinga plurality of transistors connected to one another, the plurality oftransistors including a first subset of transistors and a second subsetof transistors, amplifying the signals to be transmitted by configuringthe plurality of transistors to operate in a first mode as a poweramplifier, wherein in the first mode the first subset of transistors andthe second subset of transistors are configured to be turned on tooperate together as the power amplifier, amplifying the received signalsby configuring the plurality of transistors to operate in a second modeas a low noise amplifier, wherein in the second mode the first subset ofthe plurality of transistors are configured to be turned on to operateas the low noise amplifier and the second subset of the plurality oftransistors are configured to be turned off.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings illustrate exemplary embodiments, wherein:

FIG. 1 illustrates a communication system according to an exemplaryembodiment;

FIG. 2 illustrates an exemplary transceiver on a chip according to anexemplary embodiment;

FIGS. 3( a) and 3(b) depict a merged low noise amplifier (LNA) and poweramplifier (PA) according to an exemplary embodiment;

FIG. 4 is a flowchart depicting a method of amplifying signals using acombined power amplifier and low noise amplifier according to anexemplary embodiment.

FIG. 5 illustrates a multi-standard communication system according toanother embodiment;

FIG. 6 depicts a multi-standard transceiver which share a pin accordingto an embodiment; and

FIG. 7 illustrates a balun-switching architecture associated with theembodiment of FIG. 6.

ACRONYM LIST

ADC Analog-To-Digital Converter

BT Bluetooth

DAC Digital-To-Analog Converter

HB High Band

LB Low Band

LNA Low Noise Amplifier

LO Local Oscillator

PA Power Amplifier

RF Radio Frequency

SOC System On Chip

WLAN Wireless Local Area Network

DETAILED DESCRIPTION

The following detailed description of the exemplary embodiments refersto the accompanying drawings. The same reference numbers in differentdrawings identify the same or similar elements. Also, the followingdetailed description does not limit the invention. Instead, the scope ofthe invention is defined by the appended claims.

In order to provide some context for this discussion, FIG. 1 illustratesan exemplary electronic device 100 which is capable of communicatingwith, for example, a WiMax/Wibro base station, an WLAN access point orother transmitting and receiving part of a network represented by 102.The exemplary electronic device 100 includes a processor 106 which isconnected to a memory device 108, and which controls a transceiver 110.The transceiver 110 can be characterized as including an RF front end112 and a back end 114.

As will be described in more detail below, the RF front end 112 isgenerally responsible, for example, for tasks such as switching RX andTX via switch 116 to the antenna port associated with antenna 118, upand down converting the signals, filtering and amplification of signalswhich have been received (via low noise amplifier (LNA) 120) or are tobe transmitted (via power amplifier (PA) 122) by electronic device 100.The back end 114 is generally responsible, for example, for tasks suchas modulation/demodulation and coding/decoding of signals to betransmitted or which have been received, respectively. The RF front end112 and back end 114 may be integrated into a system on chip (SOC) ormultiple integrated circuits (IC). The RF front end 112 is connected toone or more antennas 118 via the switch 116 to combine the transmit andreceive signals. However, embodiments described below can omit theswitch 116 by combining the PA 122 and LNA 120 into one set oftransistors which are directly connected to the antenna 118.

FIG. 2 depicts a transceiver 110 according to an exemplary embodiment inmore detail, wherein the transceiver 110 is capable of transmitting andreceiving different types of signals, e.g., BT signals, WLAN signals,and/or WiMAX signals. It can be seen in FIG. 2 that the RF front end 112and system back end 114 are integrated into a single chip. Onesignificant feature of the exemplary transceiver illustrated in FIG. 2is that the pin 200 is used to convey signals from and toward theantenna 118, without the switch as depicted in FIG. 1. Among otherthings, combining reception and transmission to a single pin 200advantageously reduces the pin count of the transceiver 110 andeliminates the need for an external switch between transmission andreception and the antenna 118. Features which enable this reduction inpin count associated with signals to be coupled to the antenna 118 willbe described in more detail below with respect to FIG. 3.

To briefly describe the general operation of the blocks shown in FIG. 2,and generally moving from the right to the left of FIG. 2, a signalreceived by electronic device 100 is conveyed by pin 200 to balun 204.From the balun 204, the received signal travels to a low noise amplifier(LNA) 208 which amplifies the received signal. As denoted by box 210,the LNA 208 is combined with the power amplifier (PA) 212 whichamplifies the signals being transmitted by the transceiver 110 in amanner which will be described below with respect to FIGS. 3( a) and3(b).

Continuing on the receive path, the amplified, received signal nextreaches mixer 214 which downconverts (mixes) the amplified receivedsignal to produce an intermediate frequency (IF), which IF signal isthen filtered at block 216. The IF is converted from an analog signal toa digital signal by analog-to-digital converter (ADC) 218, and thendemodulated by demodulator 220 to generate an output signal to theprocessor 106 (not shown in FIG. 2).

Moving down to the transmit portion of transceiver 110 and generallymoving from the left to the right of the Figure, data which is receivedfrom the processor 106 for transmission is modulated by modulator 222,converted from digital to analog by DAC 224 to produce an IF signal thatthen is filtered in block 226. After filtering, the signal is frequencyupconverted by mixer block 230 and amplified via the power amplifier PA212. A phase-locked loop (PLL) 236, digitally controlled oscillator(DCO) or voltage controlled oscillator (VCO) 234 and programmablefrequency divider 232 provide input frequencies to the ADC 218, DAC 224and mixers 214 and 230 for downconversion and upconversion,respectively.

In conventional implementations, an LNA and a PA are typicallyimplemented separately since, for example, receive and transmit chainsare implemented separately from one another. However, according toexemplary embodiments, the LNAs 208 can be merged together with the PAs212. Among other potential advantages, this merger of LNAs and PAsoffers the benefit of requiring a smaller area on the chip to implementthese elements. A first example of a merged LNA/PA 300, which can beused in transceivers (e.g., a BT, WLAN, WiMAX/WiBRO transceiver), isshown in FIG. 3( a), in transmit mode, and FIG. 3( b), in receive mode.Note that in these two Figures, elements, e.g., transistors and signallines, which are shown in dotted lines are turned off or inactive duringthat particular mode of operation.

Starting with FIG. 3( a), during transmit mode of the transceiver 110,all four of the transistors 302, 304, 306 and 308 are on and operatetogether as a power amplifier 212 to amplify a transmit signal receivedon the gate lines (PA_In+ and PA_In−) of transistors 304 and 306,respectively. Note transistors 304 and 306 for those skilled in the artare also called common source (CS) transistors and may also be built outof a multitude of transistors that together form an amplifier. Theamplified signal is coupled to the joint RX/TX pin 312 by balun 314.During transmit mode, the transistors 302 and 308 have a fixed potentialapplied to their gates (e.g., 2.2V) and the voltage VDD (a relativelyhigh voltage) is applied to the center tap of the balun 314, by turningtransistor 316 on and transistor 318 off, so that maximum powerefficiency of the amplification circuitry is achieved. Morespecifically, during transmit mode, transistor 302 operates as a cascode(CG) for the power amplifier.

During receive mode, as shown in FIG. 3( b), circuitry 300 operates asan LNA for a signal received via pin 312. To enter this mode ofoperation, transistors 304 and 306 are switched off by placing arelatively low potential on their gate lines. Then, transistors 302 and308 operate to amplify the received signal from pin 312 via balun 314,i.e., operating as the LNA. At this time, the voltage VSS applied to thecenter tap of the balun 314 is reduced to a relatively low potential,e.g., by switching off transistor 316 and turning on transistor 318, toenable transistors 302 and 308 to operate as a common gate (CG) LNA byswitching their polarity. The drain side (high potential) of transistors302 and 308 are connected to amplifying stages that amplify the receivedsignal prior to being forwarded to, e.g., a mixer 214 fordownconverting.

Thus, according to one exemplary embodiment, a method for amplifyingreceived signals and signals to be transmitted in a combined poweramplifier and low noise amplifier device, can include the stepsillustrated in the flow chart of FIG. 4. Therein, at step 400, aplurality of transistors connected to one another are provided, theplurality of transistors including a first subset of transistors and asecond subset of transistors. Signals to be transmitted are amplified,at step 402, by configuring the plurality of transistors to operate in afirst mode as a power amplifier, wherein in the first mode the firstsubset of transistors and the second subset of transistors areconfigured to be turned on to operate together as the power amplifier.Received signals are amplified, at step 404, by configuring theplurality of transistors to operate in a second mode as a low noiseamplifier, wherein in the second mode the first subset of the pluralityof transistors are configured to be turned on to operate as the lownoise amplifier and the second subset of the plurality of transistorsare configured to be turned off.

Embodiments, as described above, can be applied to transceivers 110which operate in accordance with the transmission and reception ofsignals according to a single standard. However other embodiments can beapplied to transceivers which operate to provide multi-mode ormulti-standard transmit and receive capability, e.g., Bluetooth (BT) andwireless LAN (WLAN) transceivers an example of which is shown in FIG. 5.

Therein, an exemplary electronic device 500 is capable of communicatingwith both WLAN devices, e.g., represented by WLAN access point (AP) 502,and BT devices, e.g., represented by BT peer 504. The exemplaryelectronic device 500 includes a processor 506 which is connected to amemory device 508, and which controls a combined WLAN/BT transceiver510. The WLAN/BT transceiver 510 can be characterized as including an RFfront end 512 and a WLAN/BT back end 514 (the latter of which issometimes also referred to as a system-on-chip (SOC)), and can containsets of elements which are similar to those shown in FIG. 2, e.g., oneset for the WLAN portion and one set for the BT portion.

The merged LNA/PA embodiments described above can also be applied to themulti-mode or multi-standard transceiver 510. For example, two LNAs (oneeach for BT and WLAN) can be used and two PAs (one each for BT and WLAN)can be provided within transceiver 510. According to one embodiment, theBT LNA and the BT PA can be merged together as described above, whilethe WLAN LNA and WLAN PA can remain unmerged. According to anotherembodiment, the BT LNA and BT PA can remain unmerged, while the WLAN LNAand WLAN PA are merged together in accordance with the earlier describedtechniques. According to a third embodiment, both the BT LNA and BT PAcan be merged and the WLAN LNA and WLAN PA can be merged.

According to another embodiment, the number of pins used totransmit/receive signals in a BT/WLAN multi-mode transceiver 510 can bereduced to two pins, i.e., a low band pin and a high band pin, byenabling a low-band portion of the WLAN transmit/receive chain share thesame pin as the BT transmit/receive chain, as generally illustrated inFIG. 6. Therein, BT TX/RX chain 600 receives BT signals via pin 602through balun 604 and LNA 606, and transmits BT signals via pin 602through PA 608 and balun 604. The low-band WLAN portion of WLAN TX/RXshares the pin 602 by receiving low-band WLAN signals via balun 604 andLNA 606, and transmitting low-band WLAN signals via PA 612 and balun614, which couples such low-band WLAN signals onto pin 602. High-bandWLAN operations can be performed using LNA 616, PA 618, balun 620 andhigh-band pin 622.

To share pin 602 according to this embodiment, balun switching logic canbe implemented in transceiver 510 as, for example, illustrated in FIG.7. Therein balun 604 is connected in series on its primary side to balun614. On the secondary side, balun 604 is connected to the BT amplifiers606, 608 and the balun 614 is connected to the WLAN LB PA amplifier 612.Additionally, each balun 604, 614 has a transistor 700, 702,respectively, which operate as switches to selectively short circuit thesecondary side of either balun 604 or 614 under the control of balunswitching logic 704.

Balun switching logic may be provided from any desired hardware orsoftware element within transceiver 110 via a control signal to turn onor off the transistor 700 or 702. In the example of FIG. 7, transistor700 is turned on, thereby short circuiting the secondary of balun 604,while transistor 702 is turned off (as indicated by the dotted lines),thereby enabling balun 614 to couple a WLAN LB signal arriving from PA612 onto the pin 602. Alternatively, when a BT signal is to betransmitted by electronic device 100, balun 604 can be connected to pin602 by turning on transistor 702 and turning off transistor 700.

Although described in this latter embodiment with respect to WLAN andBT, the present invention is not limited to those two standards and isinstead applicable to communications associated with other standards,for example WLAN, WiBRO/WIMAX or other communication standards.

The above-described exemplary embodiments are intended to beillustrative in all respects, rather than restrictive, of the presentinvention. Thus the present invention is capable of many variations indetailed implementation that can be derived from the descriptioncontained herein by a person skilled in the art. All such variations andmodifications are considered to be within the scope and spirit of thepresent invention as defined by the following claims. No element, act,or instruction used in the description of the present application shouldbe construed as critical or essential to the invention unless explicitlydescribed as such. Also, as used herein, the article “a” is intended toinclude one or more items.

The invention claimed is:
 1. A combined power amplifier and low noiseamplifier device comprising: a plurality of transistors connected to oneanother and configured to operate in a first mode as a power amplifierfor a first signal to be transmitted by said device, and furtherconfigured to operate in a second mode as a low noise amplifier for asecond signal, which has been received by said device, said plurality oftransistors including a first subset of transistors and a second subsetof transistors, wherein in said first mode said first subset oftransistors and said second subset of transistors are configured to beturned on to operate together to amplify said first signal, while saidfirst subset of transistors conduct said first signal in a firstdirection, a transistor among said first subset of transistors operatingas a cascode, and wherein in said second mode said first subset oftransistors are configured to be turned on with a low-noise attenuationpolarity opposite to a power-amplifier polarity that said first subsetof transistors has during said first mode, to operate as said low noiseamplifier while said second subset of transistors are configured to beturned off, said first subset of transistors conducting said secondsignal in a second direction opposite to said first direction.
 2. Thecombined power amplifier and low noise amplifier device of claim 1wherein, when configured to operate in said first mode, said signal tobe transmitted is received over gate lines of said second subset oftransistors.
 3. The combined power amplifier and low noise amplifierdevice of claim 1, wherein each transistor in said second subset isconnected to a voltage source.
 4. The combined power amplifier and lownoise amplifier device of claim 1 wherein, when configured to operate insaid second mode, said signal which has been received is passed to areceive signal line connected to said first subset of transistors. 5.The combined power amplifier and low noise amplifier device of claim 4,wherein said receive signal line includes an amplifier to amplify saidsignal which has been received.
 6. The combined power amplifier and lownoise amplifier device of claim 1, wherein said device is implemented asan integrated circuit.
 7. The combined power amplifier and low noiseamplifier device of claim 6, wherein said device is further configuredto receive and to transmit multi-standard signals.
 8. The combined poweramplifier and low noise amplifier device of claim 6, wherein said deviceis further configured to receive Bluetooth (BT) and low band WirelessLocal Area Network (WLAN) signals and to transmit BT signals and lowband WLAN signals via a single pin of said integrated circuit andfurther wherein said device is configured to operate in said first modeto amplify both BT signals and low band WLAN signals to be transmittedvia said single pin and in said second mode to amplify both received BTsignals and received WLAN signals which are input to said plurality oftransistors from said single pin.
 9. The combined power amplifier andlow noise amplifier device of claim 8, wherein said single pin isconnected to a first balun and a second balun, and further comprising: afirst switch configured to short circuit said first balun when said lowband WLAN signals are to be transmitted; and a second switch configuredto short circuit said second balun when said BT signals are to betransmitted.
 10. A method for amplifying received signals and signals tobe transmitted in a combined power amplifier and low noise amplifierdevice, the method comprising: providing a plurality of transistorsconnected to one another, said plurality of transistors including afirst subset of transistors and a second subset of transistors;amplifying said first signals to be transmitted by configuring saidplurality of transistors to operate in a first mode as a poweramplifier, wherein in said first mode said first subset of transistorsand said second subset of transistors are configured to be turned on tooperate together to amplify said first signals, while said first subsetof transistors conduct said first signals in a first direction, atransistor among said first subset of transistors operating as acascode; and amplifying said received signals by configuring saidplurality of transistors to operate in a second mode as a low noiseamplifier, wherein in said second mode said first subset of transistorsare configured to be turned on with a low-noise attenuation polarityopposite to a power-amplifier polarity that said first subset oftransistors has during said first mode, to operate as said low noiseamplifier while said second subset of transistors are configured to beturned off, said first subset of transistors conducting said receivedsignals in a second direction opposite to said first direction.
 11. Themethod of claim 10, further comprising: receiving, when configured tooperate in said first mode, said signals to be transmitted over gatelines of said second subset of transistors.
 12. The method of claim 10,wherein each transistor in said second subset is connected to a voltagesource.
 13. The method of claim 10, further comprising: passing, whenconfigured to operate in said second mode, said amplified, receivedsignals to a receive signal line connected to said first subset oftransistors.
 14. The method of claim 13, further comprising: invertingsaid amplified received signals on said receive signal line.
 15. Themethod of claim 10, wherein said combined power amplifier and low noiseamplifier device is implemented as an integrated circuit.
 16. The methodof claim 15, further comprising: configuring said combined poweramplifier and low noise amplifier device to receive Bluetooth (BT) andlow band Wireless Local Area Network (WLAN) signals and to transmit BTsignals and low band WLAN signals.
 17. The method of claim 15, furthercomprising: configuring said combined power amplifier and low noiseamplifier device to receive Bluetooth (BT) and low band Wireless LocalArea Network (WLAN) signals and to transmit BT signals and low band WLANsignals via a single pin of said integrated circuit; wherein said deviceis configured to operate in said first mode to amplify both BT signalsand low band WLAN signals to be transmitted via said single pin and insaid second mode to amplify both received BT signals and received WLANsignals which are input to said plurality of transistors from saidsingle pin.
 18. The method of claim 17, wherein said single pin isconnected to a first balun and a second balun, and further comprising:short circuiting said first balun when said low band WLAN signals are tobe transmitted; and short circuiting said second balun when said BTsignals are to be transmitted.
 19. A combined power amplifier (PA) andlow noise amplifier (LNA) device, comprising: a first pair oftransistors arranged in a common source mode configuration to receiveand amplify equal but opposite polarity transmission signals when saiddevice is in a transmit PA mode of operation; and a third and fourthtransistor, a respective one of each arranged in a cascode configurationwith a respective one of said first pair of transistors when said deviceis in said transmit PA mode of operation to facilitate amplifying saidtransmission signals, wherein said third and fourth transistors conductsaid transmission signals in a first direction, and when said device isin said LNA receive mode, said first pair of transistors are switchedoff, and said third and fourth transistors operate as a common gate LNAto amplify a received signal by conducting said received signals in asecond direction opposite to said first direction.
 20. The combined PAand LNA device according to claim 19, wherein said device is implementedas an integrated circuit.